Verification Engineer for Bus FabricRecruitment site：TaiwanRecord of formal schooling：Bachelor/Master or aboveWork experience：5-10 years

　　Qualifications:
　　1. 5+yearsofdesignverificationexperienceininterconnectionandon-chipbusfabric.
Referencestoaparticularnumberofyearsexperienceareforindicativepurposesonly.Applicationsfromcandidateswithequivalentexperiencewillbeconsidered,providedthatthecandidatecandemonstrateanabilitytofulfilltheprincipaldutiesoftheroleandpossessestherequiredcompetencies.
　　2. GoodunderstandingofandrelatedexperiencesinAMBAspecifications(CHI/ACE/AXI/AHB/APB)andDRAMtransactionbehavior.
　　3. Experienceincoherency,MMUandconcurrencyincomplexSoCarchitectures;ExperienceinCCIX,CXL,Gen-Z,orOpenCAPIisaplus.
　　4. In-depthknowledgeofsimulationverificationmethodologies,formalverificationtechnologiesandEDAflow/tools(UVM/OVM/VMMetc.)
　　5. Proactiveaboutlearningandhands-onproblemsolving.
　　6. ExperienceofRTLcodingandwritingscriptsinPerlorPythonisaplus.