Qualifications:
1. 7+yearsofDRAMsusb-systemdesignexperience,especiallyfordata-intensivescenariossuchasDRAMsusb-systemforhigh-endTV/smartphone,datacenter,AItraining/inference.
Referencestoaparticularnumberofyearsexperienceareforindicativepurposesonly.Applicationsfromcandidateswithequivalentexperiencewillbeconsidered,providedthatthecandidatecandemonstrateanabilitytofulfilltheprincipaldutiesoftheroleandpossessestherequiredcompetencies.
2. UnderstandingofLPDDR4/4xJEDECspecsisamust.UnderstandingofLPDDR5,GDDR5/6,and/orHMBisaplus.
3. ExperienceinallphasesofamodernSoCdesignflowfromspecification,pre-Si,post-Si,andcommercialization.
4. Exposuretoentirechipdevelopmentcyclespanningacrossarchitecture,implementation,bring-upexperienceinvalidatingpower/performanceatasystemlevelonboards.
5. Handsonexperienceinconstraintdevelopmentandtimingclosure.
6. Understandingofpowerintent(UPF)andtimingconstraints.
7. Plus:ExperienceinDVFSand/orAVS.
8. Plus:GoodunderstandingofAMBAspecifications(CHI/ACE/AXI),on-chipbusfabric,andMMU.
9. Plus:ExperienceinsystemlevelSIPIanalysisforhighspeedDDRand/orSERDESinterfaces.
10. Plus:Experienceinchipsetpartitioninganalysis,PDNanalysis,orhigh-speedinterfacesignalintegrity/powerintegrityanalysisandarchitecture.